DC~6 GHz衰减芯片低热阻的封装技术

    Low Thermal Resistance Packaging Technology for Attenuation Chips in the DC~6 GHz Band

    • 摘要: 随着微波通信系统的快速发展,数控(CNC)衰减器在相控阵雷达领域的应用愈发广泛。CNC衰减器由尺寸小、性能优异的衰减芯片级联数控集成, 而集成密度的提高与芯片尺寸的缩小,导致衰减芯片的散热难题愈发突出。针对DC~6 GHz频段下衰减芯片封装的低热阻技术需求,文中选用Sn60Pb40、Au80Sn20、Sn96.5Ag3.5及纳米银材料进行封装试验,创新性地采用真空融合焊接与多通道排气烧结工艺,探究不同封装结构对应的工艺曲线,实现了衰减芯片与封装基板之间的低热阻可靠互连,有效提高了芯片的封装可靠性。结果表明:采用纳米银材料封装后的衰减芯片热阻率最低,器件发热量显著减小,从而有效降低热量对芯片的影响,提升其在雷达系统的可靠性。

       

      Abstract: With the rapid development of microwave communication systems, computer numerical control (CNC) attenuators are increasingly widely used in the field of phased array radar. CNC attenuators are numerically integrated by cascading small size, high-performance attenuation chips; however, the increased integration density and the decreased chip size have exacerbated the challenge of heat dissipation of these attenuator chips. To address the low thermal resistance requirements for attenuator chip packaging within the DC~6 GHz frequency band, Sn60Pb40, Au80Sn20, Sn96.5Ag3.5 and nano-silver materials are chosen for packaging experiments in this paper; in particular, an innovative vacuum fusion welding and multi-channel exhaust-gas sintering process is employed, the process curves corresponding to different packaging structures are investigated, and a reliable low thermal resistance interconnection between the attenuator chip and the packaging substrate is achieved, hence effectively improving the reliability of chip packaging. The results show that the attenuation chips packaged with nano-silver materials exhibit the lowest thermal resistivity and a significantly reduced heat generation, thereby effectively reducing the impact of heat on chips and improving its reliability in radar system.

       

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