Abstract: Digital decimation filter is an important part of the Sigma-Delta (Σ-Δ) analog digital converter(ADC), which is responsible for filtering and decimating modulator output signal. This design of a digital decimation filter is constituted by the cascode integrated-comb(CIC) filter、CIC compensation filter and half band filter, First, Σ-Δ ADC principle is introduced; then, the digital decimation filter principle and realization is discussed; later, the funiction of the decimation filter is achieved respectively by MATLAB and Verilog; finally, the actual chip is tested and verificated, and the function and performance of the chip meet the requirements.